yaxpeax_superh

Enum SuperHInstruction

Source 
pub enum SuperHInstruction {

Show 235 variants    MovImm(u8, SuperHRegister),
    MovImmW(Displacement8, SuperHRegister),
    MovImmL(Displacement8, SuperHRegister),
    MovReg(SuperHRegister, SuperHRegister),
    MovToAtRegB(SuperHRegister, SuperHRegister),
    MovToAtRegW(SuperHRegister, SuperHRegister),
    MovToAtRegL(SuperHRegister, SuperHRegister),
    MovFromAtRegB(SuperHRegister, SuperHRegister),
    MovFromAtRegW(SuperHRegister, SuperHRegister),
    MovFromAtRegL(SuperHRegister, SuperHRegister),
    MovToAtRegPreDecrementB(SuperHRegister, SuperHRegister),
    MovToAtRegPreDecrementW(SuperHRegister, SuperHRegister),
    MovToAtRegPreDecrementL(SuperHRegister, SuperHRegister),
    MovFromAtRegPostIncrementB(SuperHRegister, SuperHRegister),
    MovFromAtRegPostIncrementW(SuperHRegister, SuperHRegister),
    MovFromAtRegPostIncrementL(SuperHRegister, SuperHRegister),
    MovToAtDisplacedRegisterB(Displacement4, SuperHRegister),
    MovToAtDisplacedRegisterW(Displacement4, SuperHRegister),
    MovToAtDisplacedRegisterL(SuperHRegister, Displacement4, SuperHRegister),
    MovFromAtDisplacedRegisterB(Displacement4, SuperHRegister),
    MovFromAtDisplacedRegisterW(Displacement4, SuperHRegister),
    MovFromAtDisplacedRegisterL(Displacement4, SuperHRegister, SuperHRegister),
    MovToAtIndexedRegisterB(SuperHRegister, SuperHRegister),
    MovToAtIndexedRegisterW(SuperHRegister, SuperHRegister),
    MovToAtIndexedRegisterL(SuperHRegister, SuperHRegister),
    MovFromAtIndexedRegisterB(SuperHRegister, SuperHRegister),
    MovFromAtIndexedRegisterW(SuperHRegister, SuperHRegister),
    MovFromAtIndexedRegisterL(SuperHRegister, SuperHRegister),
    MovToAtDisplacedGbrB(Displacement8),
    MovToAtDisplacedGbrW(Displacement8),
    MovToAtDisplacedGbrL(Displacement8),
    MovFromAtDisplacedGbrB(Displacement8),
    MovFromAtDisplacedGbrW(Displacement8),
    MovFromAtDisplacedGbrL(Displacement8),
    Mova(Displacement8),
    Movt(SuperHRegister),
    SwapB(SuperHRegister, SuperHRegister),
    SwapW(SuperHRegister, SuperHRegister),
    Xtrct(SuperHRegister, SuperHRegister),
    AddReg(SuperHRegister, SuperHRegister),
    AddImm(u8, SuperHRegister),
    AddC(SuperHRegister, SuperHRegister),
    AddV(SuperHRegister, SuperHRegister),
    CmpEqImm(u8),
    CmpEqReg(SuperHRegister, SuperHRegister),
    CmpHs(SuperHRegister, SuperHRegister),
    CmpGe(SuperHRegister, SuperHRegister),
    CmpHi(SuperHRegister, SuperHRegister),
    CmpGt(SuperHRegister, SuperHRegister),
    CmpPz(SuperHRegister),
    CmpPl(SuperHRegister),
    CmpStr(SuperHRegister, SuperHRegister),
    Div1(SuperHRegister, SuperHRegister),
    Div0S(SuperHRegister, SuperHRegister),
    Div0U,
    DmulsL(SuperHRegister, SuperHRegister),
    DmuluL(SuperHRegister, SuperHRegister),
    Dt(SuperHRegister),
    ExtsB(SuperHRegister, SuperHRegister),
    ExtsW(SuperHRegister, SuperHRegister),
    ExtuB(SuperHRegister, SuperHRegister),
    ExtuW(SuperHRegister, SuperHRegister),
    MacL(SuperHRegister, SuperHRegister),
    MacW(SuperHRegister, SuperHRegister),
    MulL(SuperHRegister, SuperHRegister),
    MulsW(SuperHRegister, SuperHRegister),
    MuluW(SuperHRegister, SuperHRegister),
    Neg(SuperHRegister, SuperHRegister),
    Negc(SuperHRegister, SuperHRegister),
    Sub(SuperHRegister, SuperHRegister),
    Subc(SuperHRegister, SuperHRegister),
    Subv(SuperHRegister, SuperHRegister),
    AndReg(SuperHRegister, SuperHRegister),
    AndImm(u8),
    AndB(u8),
    Not(SuperHRegister, SuperHRegister),
    OrReg(SuperHRegister, SuperHRegister),
    OrImm(u8),
    OrB(u8),
    TasB(SuperHRegister),
    TstReg(SuperHRegister, SuperHRegister),
    TstImm(u8),
    TstB(u8),
    XorReg(SuperHRegister, SuperHRegister),
    XorImm(u8),
    XorB(u8),
    RotL(SuperHRegister),
    RotR(SuperHRegister),
    RotcL(SuperHRegister),
    RotcR(SuperHRegister),
    ShaD(SuperHRegister, SuperHRegister),
    ShaL(SuperHRegister),
    ShaR(SuperHRegister),
    ShlD(SuperHRegister, SuperHRegister),
    ShlL(SuperHRegister),
    ShlR(SuperHRegister),
    ShlL2(SuperHRegister),
    ShlR2(SuperHRegister),
    ShlL8(SuperHRegister),
    ShlR8(SuperHRegister),
    ShlL16(SuperHRegister),
    ShlR16(SuperHRegister),
    Bf(Displacement8),
    BfS(Displacement8),
    Bt(Displacement8),
    BtS(Displacement8),
    Bra(Displacement12),
    BraF(SuperHRegister),
    Bsr(Displacement12),
    BsrF(SuperHRegister),
    Jmp(SuperHRegister),
    Jsr(SuperHRegister),
    Rts,
    ClrMac,
    ClrS,
    ClrT,
    LdcSr(SuperHRegister),
    LdcGbr(SuperHRegister),
    LdcVbr(SuperHRegister),
    LdcSsr(SuperHRegister),
    LdcSpc(SuperHRegister),
    LdcDbr(SuperHRegister),
    LdcRnBank(SuperHRegister, SuperHRegisterBank),
    LdcLSr(SuperHRegister),
    LdcLGbr(SuperHRegister),
    LdcLVbr(SuperHRegister),
    LdcLSsr(SuperHRegister),
    LdcLSpc(SuperHRegister),
    LdcLDbr(SuperHRegister),
    LdcLRnBank(SuperHRegister, SuperHRegisterBank),
    LdsMach(SuperHRegister),
    LdsMacl(SuperHRegister),
    LdsPr(SuperHRegister),
    LdsLMach(SuperHRegister),
    LdsLMacl(SuperHRegister),
    LdsLPr(SuperHRegister),
    Ldtlb,
    MovcaL(SuperHRegister),
    Nop,
    OcbI(SuperHRegister),
    OcbP(SuperHRegister),
    OcbWb(SuperHRegister),
    Pref(SuperHRegister),
    Rte,
    SetS,
    SetT,
    Sleep,
    StcSr(SuperHRegister),
    StcGbr(SuperHRegister),
    StcVbr(SuperHRegister),
    StcSsr(SuperHRegister),
    StcSpc(SuperHRegister),
    StcSgr(SuperHRegister),
    StcDbr(SuperHRegister),
    StcRmBank(SuperHRegisterBank, SuperHRegister),
    StcLSr(SuperHRegister),
    StcLGbr(SuperHRegister),
    StcLVbr(SuperHRegister),
    StcLSsr(SuperHRegister),
    StcLSpc(SuperHRegister),
    StcLSgr(SuperHRegister),
    StcLDbr(SuperHRegister),
    StcLRmBank(SuperHRegisterBank, SuperHRegister),
    StsMach(SuperHRegister),
    StsMacl(SuperHRegister),
    StsPr(SuperHRegister),
    StsLMach(SuperHRegister),
    StsLMacl(SuperHRegister),
    StsLPr(SuperHRegister),
    Trapa(u8),
    Fldi0(SuperHFloatRegister),
    Fldi1(SuperHFloatRegister),
    FMovS(SuperHFloatRegister, SuperHFloatRegister),
    FMovAtRegS(SuperHRegister, SuperHFloatRegister),
    FMovAtIndexedRegisterS(SuperHRegister, SuperHFloatRegister),
    FMovAtPostIncrementRegS(SuperHRegister, SuperHFloatRegister),
    FMovToAtRegS(SuperHFloatRegister, SuperHRegister),
    FMovToAtPreDecrementRegS(SuperHFloatRegister, SuperHRegister),
    FMovToAtIndexedRegisterS(SuperHFloatRegister, SuperHRegister),
    FMov(SuperHDoubleRegister, SuperHDoubleRegister),
    FMovAtReg(SuperHRegister, SuperHDoubleRegister),
    FMovAtIndexedRegister(SuperHRegister, SuperHDoubleRegister),
    FMovAtPostIncrementReg(SuperHRegister, SuperHDoubleRegister),
    FMovToAtReg(SuperHDoubleRegister, SuperHRegister),
    FMovToAtPreDecrementReg(SuperHDoubleRegister, SuperHRegister),
    FMovToAtIndexedRegister(SuperHDoubleRegister, SuperHRegister),
    Flds(SuperHFloatRegister),
    Fsts(SuperHFloatRegister),
    FabsS(SuperHFloatRegister),
    FaddS(SuperHFloatRegister, SuperHFloatRegister),
    FcmpEqS(SuperHFloatRegister, SuperHFloatRegister),
    FcmpGtS(SuperHFloatRegister, SuperHFloatRegister),
    FdivS(SuperHFloatRegister, SuperHFloatRegister),
    FloatS(SuperHFloatRegister),
    Fmac(SuperHFloatRegister, SuperHFloatRegister),
    FmulS(SuperHFloatRegister, SuperHFloatRegister),
    FnegS(SuperHFloatRegister),
    FsqrtS(SuperHFloatRegister),
    FsubS(SuperHFloatRegister, SuperHFloatRegister),
    FrtcS(SuperHFloatRegister),
    Fabs(SuperHDoubleRegister),
    Fadd(SuperHDoubleRegister, SuperHDoubleRegister),
    FcmpEq(SuperHDoubleRegister, SuperHDoubleRegister),
    FcmpGt(SuperHDoubleRegister, SuperHDoubleRegister),
    Fdiv(SuperHDoubleRegister, SuperHDoubleRegister),
    FcnvDs(SuperHDoubleRegister),
    FcnvSd(SuperHDoubleRegister),
    Float(SuperHDoubleRegister),
    Fmul(SuperHDoubleRegister, SuperHDoubleRegister),
    Fneg(SuperHDoubleRegister),
    Fsqrt(SuperHDoubleRegister),
    Fsub(SuperHDoubleRegister, SuperHDoubleRegister),
    Frtc(SuperHDoubleRegister),
    LdsFpscr(SuperHRegister),
    LdsFpul(SuperHRegister),
    LdsFpscrL(SuperHRegister),
    LdsFpulL(SuperHRegister),
    StsFpscr(SuperHRegister),
    StsFpul(SuperHRegister),
    StsFpscrL(SuperHRegister),
    StsFpulL(SuperHRegister),
    FMovToX(SuperHDoubleRegister, SuperHExtendedDoubleRegister),
    FMovFromX(SuperHExtendedDoubleRegister, SuperHDoubleRegister),
    FMovX(SuperHExtendedDoubleRegister, SuperHExtendedDoubleRegister),
    FMovAtRegX(SuperHRegister, SuperHExtendedDoubleRegister),
    FMovAtPostIncrementRegX(SuperHRegister, SuperHExtendedDoubleRegister),
    FMovAtIndexedRegisterX(SuperHRegister, SuperHExtendedDoubleRegister),
    FMovToAtRegX(SuperHExtendedDoubleRegister, SuperHRegister),
    FMovToAtPreDecrementRegX(SuperHExtendedDoubleRegister, SuperHRegister),
    FMovToAtIndexedRegisterX(SuperHExtendedDoubleRegister, SuperHRegister),
    Fipr(SuperHVectorFloatRegister, SuperHVectorFloatRegister),
    Xmrtx(SuperHVectorFloatRegister),
    FrChg,
    FsChg,
    CasL(SuperHRegister, SuperHRegister),

}

Variants§

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MovImm(u8, SuperHRegister)

MOV #imm,Rn (imm → sign extension → Rn) 1110nnnniiiiiiii

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MovImmW(Displacement8, SuperHRegister)

MOV.W @(disp,PC),Rn ((disp * 2 + PC + 4) → sign extension → Rn) 1001nnnndddddddd

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MovImmL(Displacement8, SuperHRegister)

MOV.L @(disp,PC),Rn ((disp * 2 + PC & 0xFFFF_FFFC + 4) → Rn) 1101nnnndddddddd

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MovReg(SuperHRegister, SuperHRegister)

MOV Rm,Rn (Rm → Rn) 0110nnnnmmmm0011

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MovToAtRegB(SuperHRegister, SuperHRegister)

MOV.B Rm,@Rn (Rm → sign extension → (Rn)) 0010nnnnmmmm0000

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MovToAtRegW(SuperHRegister, SuperHRegister)

MOV.W Rm,@Rn (Rm → sign extension → (Rn)) 0010nnnnmmmm0001

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MovToAtRegL(SuperHRegister, SuperHRegister)

MOV.L Rm,@Rn (Rm → (Rn)) 0010nnnnmmmm0010

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MovFromAtRegB(SuperHRegister, SuperHRegister)

MOV.B @Rm,Rn ((Rm) → sign extension → Rn) 0110nnnnmmmm0000

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MovFromAtRegW(SuperHRegister, SuperHRegister)

MOV.W @Rm,Rn ((Rm) → sign extension → Rn) 0110nnnnmmmm0001

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MovFromAtRegL(SuperHRegister, SuperHRegister)

MOV.L @Rm,Rn ((Rm) → Rn) 0110nnnnmmmm0010

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MovToAtRegPreDecrementB(SuperHRegister, SuperHRegister)

MOV.B Rm,@-Rn (Rn - 1 → Rn, Rm → (Rn)) 0010nnnnmmmm0100

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MovToAtRegPreDecrementW(SuperHRegister, SuperHRegister)

MOV.W Rm,@-Rn (Rn - 2 → Rn, Rm → (Rn)) 0010nnnnmmmm0101

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MovToAtRegPreDecrementL(SuperHRegister, SuperHRegister)

MOV.L Rm,@-Rn (Rn - 4 → Rn, Rm → (Rn)) 0010nnnnmmmm0110

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MovFromAtRegPostIncrementB(SuperHRegister, SuperHRegister)

MOV.B @Rm+,Rn ((Rm) → sign extension → Rn, Rm + 1 → Rm) 0110nnnnmmmm0100

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MovFromAtRegPostIncrementW(SuperHRegister, SuperHRegister)

MOV.W @Rm+,Rn ((Rm) → sign extension → Rn, Rm + 2 → Rm) 0110nnnnmmmm0101

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MovFromAtRegPostIncrementL(SuperHRegister, SuperHRegister)

MOV.L @Rm+,Rn ((Rm) → sign extension → Rn, Rm + 4 → Rm) 0110nnnnmmmm0110

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MovToAtDisplacedRegisterB(Displacement4, SuperHRegister)

MOV.B R0,@(disp,Rn) (R0 → (disp + Rn)) 10000000nnnndddd

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MovToAtDisplacedRegisterW(Displacement4, SuperHRegister)

MOV.W R0,@(disp,Rn) (R0 → (disp * 2 + Rn)) 10000001nnnndddd

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MovToAtDisplacedRegisterL(SuperHRegister, Displacement4, SuperHRegister)

MOV.L Rm,@(disp,Rn) (Rm → (disp * 4 + Rn)) 0001nnnnmmmmdddd

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MovFromAtDisplacedRegisterB(Displacement4, SuperHRegister)

MOV.B @(disp,Rm),R0 ((disp + Rm) → sign extension → R0) 10000100mmmmdddd

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MovFromAtDisplacedRegisterW(Displacement4, SuperHRegister)

MOV.W @(disp,Rm),R0 ((disp * 2 + Rm) → sign extension → R0) 10000101mmmmdddd

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MovFromAtDisplacedRegisterL(Displacement4, SuperHRegister, SuperHRegister)

MOV.L @(disp,Rm),Rn ((disp * 4 + Rm) → Rn) 0101nnnnmmmmdddd

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MovToAtIndexedRegisterB(SuperHRegister, SuperHRegister)

MOV.B Rm,@(R0,Rn) (Rm → (R0 + Rn)) 0000nnnnmmmm0100

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MovToAtIndexedRegisterW(SuperHRegister, SuperHRegister)

MOV.W Rm,@(R0,Rn) (Rm → (R0 + Rn)) 0000nnnnmmmm0101

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MovToAtIndexedRegisterL(SuperHRegister, SuperHRegister)

MOV.L Rm,@(R0,Rn) (Rm → (R0 + Rn)) 0000nnnnmmmm0110

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MovFromAtIndexedRegisterB(SuperHRegister, SuperHRegister)

MOV.B @(R0,Rm),Rn ((R0 + Rm) → sign extension → Rn) 0000nnnnmmmm1100

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MovFromAtIndexedRegisterW(SuperHRegister, SuperHRegister)

MOV.W @(R0,Rm),Rn ((R0 + Rm) → sign extension → Rn) 0000nnnnmmmm1101

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MovFromAtIndexedRegisterL(SuperHRegister, SuperHRegister)

MOV.L @(R0,Rm),Rn ((R0 + Rm) → Rn) 0000nnnnmmmm1110

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MovToAtDisplacedGbrB(Displacement8)

MOV.B R0,@(disp,GBR) (R0 → (disp + GBR)) 11000000dddddddd

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MovToAtDisplacedGbrW(Displacement8)

MOV.W R0,@(disp,GBR) (R0 → (disp * 2 + GBR)) 11000001dddddddd

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MovToAtDisplacedGbrL(Displacement8)

MOV.L R0,@(disp,GBR) (R0 → (disp * 4 + GBR)) 11000010dddddddd

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MovFromAtDisplacedGbrB(Displacement8)

MOV.B @(disp,GBR),R0 ((disp + GBR) → sign extension → R0) 11000100dddddddd

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MovFromAtDisplacedGbrW(Displacement8)

MOV.W @(disp,GBR),R0 ((disp * 2 + GBR) → sign extension → R0) 11000101dddddddd

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MovFromAtDisplacedGbrL(Displacement8)

MOV.L @(disp,GBR),R0 ((disp * 4 + GBR) → R0) 11000110dddddddd

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Mova(Displacement8)

MOVA @(disp,PC),R0 (disp * 4 + PC & 0xFFFF_FFFC + 4 → R0) 11000111dddddddd

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Movt(SuperHRegister)

MOVT Rn (T → Rn) 0000nnnn00101001

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SwapB(SuperHRegister, SuperHRegister)

SWAP.B Rm,Rn (Rm → swap lower 2 bytes → REG) 0110nnnnmmmm1000

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SwapW(SuperHRegister, SuperHRegister)

SWAP.W Rm,Rn (Rm → swap upper/lower words → REG) 0110nnnnmmmm1001

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Xtrct(SuperHRegister, SuperHRegister)

XTRCT Rm,Rn (Rm:Rn middle 32 bits → Rn) 0010nnnnmmmm1101

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AddReg(SuperHRegister, SuperHRegister)

ADD Rm,Rn (Rn + Rm → Rn) 0011nnnnmmmm1100

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AddImm(u8, SuperHRegister)

ADD #imm,Rn (Rn + imm → Rn) 0111nnnniiiiiiii

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AddC(SuperHRegister, SuperHRegister)

ADDC Rm,Rn (Rn + Rm + T → Rn, carry → T) 0011nnnnmmmm1110 T = Carry

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AddV(SuperHRegister, SuperHRegister)

ADDV Rm,Rn (Rn + Rm → Rn, overflow → T) 0011nnnnmmmm1111 T = Overflow

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CmpEqImm(u8)

CMP/EQ #imm,R0 (When R0 = imm, 1 → T; Otherwise, 0 → T) 10001000iiiiiiii T = Comparison result

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CmpEqReg(SuperHRegister, SuperHRegister)

CMP/EQ Rm,Rn (When Rn = Rm, 1 → T; Otherwise, 0 → T) 0011nnnnmmmm0000 T = Comparison result

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CmpHs(SuperHRegister, SuperHRegister)

CMP/HS Rm,Rn (When Rn ≥ Rm (unsigned), 1 → T; Otherwise, 0 → T) 0011nnnnmmmm0010 T = Comparison result

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CmpGe(SuperHRegister, SuperHRegister)

CMP/GE Rm,Rn (When Rn ≥ Rm (signed), 1 → T; Otherwise, 0 → T) 0011nnnnmmmm0011 T = Comparison result

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CmpHi(SuperHRegister, SuperHRegister)

CMP/HI Rm,Rn (When Rn > Rm (unsigned), 1 → T; Otherwise, 0 → T) 0011nnnnmmmm0110 T = Comparison result

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CmpGt(SuperHRegister, SuperHRegister)

CMP/GT Rm,Rn (When Rn > Rm (signed), 1 → T; Otherwise, 0 → T) 0011nnnnmmmm0111 T = Comparison result

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CmpPz(SuperHRegister)

CMP/PZ Rn (When Rn ≥ 0, 1 → T; Otherwise, 0 → T) 0100nnnn00010001 T = Comparison result

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CmpPl(SuperHRegister)

CMP/PL Rn (When Rn > 0, 1 → T; Otherwise, 0 → T) 0100nnnn00010101 T = Comparison result

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CmpStr(SuperHRegister, SuperHRegister)

CMP/STR Rm,Rn (When any bytes are equal, 1 → T; Otherwise, 0 → T) 0010nnnnmmmm1100 T = Comparison result

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Div1(SuperHRegister, SuperHRegister)

DIV1 Rm,Rn (1-step division (Rn ÷ Rm)) 0011nnnnmmmm0100 T = Calculation result

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Div0S(SuperHRegister, SuperHRegister)

DIV0S Rm,Rn (MSB of Rn → Q, MSB of Rm → M, M ^ Q → T) 0010nnnnmmmm0111 T = Calculation result

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Div0U

DIV0U (0 → M/Q/T) 0000000000011001 T = 0

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DmulsL(SuperHRegister, SuperHRegister)

DMULS.L Rm,Rn (Signed, Rn * Rm → MAC, 32 * 32 → 64 bits) 0011nnnnmmmm1101

Level: Sh2

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DmuluL(SuperHRegister, SuperHRegister)

DMULU.L Rm,Rn (Unsigned, Rn * Rm → MAC, 32 * 32 → 64 bits) 0011nnnnmmmm0101

Level: Sh2

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Dt(SuperHRegister)

DT Rn (Rn - 1 → Rn; When Rn = 0, 1 → T; Otherwise Rn ≠ 0, 0 → T) 0100nnnn00010000 T = Comparison result

Level: Sh2

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ExtsB(SuperHRegister, SuperHRegister)

EXTS.B Rm,Rn (Rm sign-extended from byte → Rn) 0110nnnnmmmm1110

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ExtsW(SuperHRegister, SuperHRegister)

EXTS.W Rm,Rn (Rm sign-extended from word → Rn) 0110nnnnmmmm1111

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ExtuB(SuperHRegister, SuperHRegister)

EXTU.B Rm,Rn (Rm zero-extended from byte → Rn) 0110nnnnmmmm1100

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ExtuW(SuperHRegister, SuperHRegister)

EXTU.W Rm,Rn (Rm zero-extended from word → Rn) 0110nnnnmmmm1101

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MacL(SuperHRegister, SuperHRegister)

MAC.L @Rm+,@Rn+ (Signed, (Rn) * (Rm) + MAC → MAC, Rn + 4 → Rn, Rm + 4 → Rm; 32 * 32 + 64 → 64 bits) 0000nnnnmmmm1111`

Level: Sh2

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MacW(SuperHRegister, SuperHRegister)

MAC.L @Rm+,@Rn+ (Signed, (Rn) * (Rm) + MAC → MAC, Rn + 2 → Rn, Rm + 2 → Rm; 16 * 16 + 64 → 64 bits) 0100nnnnmmmm1111`

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MulL(SuperHRegister, SuperHRegister)

MAC.L Rm,Rn (Rn * Rm → MACL, 32 * 32→ 32 bits) 0000nnnnmmmm0111

Level: Sh2

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MulsW(SuperHRegister, SuperHRegister)

MULS.W Rm,Rn (Signed, Rn * Rm → MACL, 16 * 16 → 32 bits) 0010nnnnmmmm1111

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MuluW(SuperHRegister, SuperHRegister)

MULU.W Rm,Rn (Unsigned, Rn * Rm → MACL, 16 * 16 → 32 bits) 0010nnnnmmmm1110

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Neg(SuperHRegister, SuperHRegister)

NEG Rm,Rn (0 - Rm → Rn) 0110nnnnmmmm1011

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Negc(SuperHRegister, SuperHRegister)

NEGC Rm,Rn (0 - Rm - T → Rn, borrow → T) 0110nnnnmmmm1010 T = Borrow

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Sub(SuperHRegister, SuperHRegister)

SUB Rm,Rn (Rn - Rm → Rn) 0011nnnnmmmm1000

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Subc(SuperHRegister, SuperHRegister)

SUBC Rm,Rn (Rn - Rm - T → Rn, borrow → T) 0011nnnnmmmm1010 T = Borrow

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Subv(SuperHRegister, SuperHRegister)

SUBV Rm,Rn (Rn - Rm → Rn, underflow → T) 0011nnnnmmmm1011 T = Underflow

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AndReg(SuperHRegister, SuperHRegister)

AND Rm,Rn (Rn & Rm → Rn) 0010nnnnmmmm1001

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AndImm(u8)

AND #imm,R0 (R0 & imm → R0) 11001001iiiiiiii

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AndB(u8)

AND.B #imm,@(R0,GBR) ((R0 + GBR) & imm → (R0 + GBR)) 11001101iiiiiiii

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Not(SuperHRegister, SuperHRegister)

NOT Rm,Rn (~Rm → Rn) 0110nnnnmmmm0111

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OrReg(SuperHRegister, SuperHRegister)

OR Rm,Rn (Rn | Rm → Rn) 0010nnnnmmmm1011

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OrImm(u8)

OR #imm,R0 (R0 | imm → R0) 11001011iiiiiiii

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OrB(u8)

OR.B #imm,@(R0,GBR) ((R0 + GBR) | imm → (R0 + GBR)) 11001111iiiiiiii

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TasB(SuperHRegister)

TAS.B @Rn (When (Rn) = 0, 1 → T; Otherwise, 0 → T; In both cases, 1 → MSB of (Rn)) 0100nnnn00011011 T = Test result

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TstReg(SuperHRegister, SuperHRegister)

TST Rm,Rn (Rn & Rm; when result = 0, 1 → T; Otherwise, 0 → T) 0010nnnnmmmm1000 T = Test result

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TstImm(u8)

TST #imm,R0 (R0 & imm; when result = 0, 1 → T; Otherwise, 0 → T) 11001000iiiiiiii T = Test result

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TstB(u8)

TST.B #imm,@(R0,GBR) ((R0 + GBR) & imm, When result = 0, 1 → T; Otherwise, 0 → T) 11001100iiiiiiii T = Test result

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XorReg(SuperHRegister, SuperHRegister)

XOR Rm,Rn (Rn ^ Rm → Rn) 0010nnnnmmmm1010 T = Test result

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XorImm(u8)

XOR #imm,R0 (R0 ^ imm → R0) 11001010iiiiiiii T = Test result

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XorB(u8)

XOR.B #imm,@(R0,GBR) ((R0 + GBR) ^ imm → R0) 11001110iiiiiiii T = Test result

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RotL(SuperHRegister)

ROTL Rn (T ← Rn ← MSB) 0100nnnn00000100 T = MSB

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RotR(SuperHRegister)

ROTR Rn (LSB → Rn → T) 0100nnnn00000101 T = LSB

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RotcL(SuperHRegister)

ROTCL Rn (T ← Rn ← T) 0100nnnn00100100 T = MSB

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RotcR(SuperHRegister)

ROTCR Rn (T → Rn → T) 0100nnnn00100101 T = LSB

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ShaD(SuperHRegister, SuperHRegister)

SHAD Rm,Rn (When Rn ≥ 0, Rn << Rm → Rn, When Rn < 0, Rn >> Rm → [MSB → Rn]) 0100nnnnmmmm1100

Level: J2

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ShaL(SuperHRegister)

SHAL Rn (T ← Rn ← 0) 0100nnnn00100000 T = MSB

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ShaR(SuperHRegister)

SHAR Rn (MSB → Rn → T) 0100nnnn00100001 T = LSB

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ShlD(SuperHRegister, SuperHRegister)

SHLD Rm,Rn (When Rn ≥ 0, Rn << Rm → Rn, When Rn < 0, Rn >> Rm → [0 → Rn]) 0100nnnnmmmm1101

Level: J2

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ShlL(SuperHRegister)

SHLL Rn (T ← Rn ← 0) 0100nnnn00000000 T = MSB

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ShlR(SuperHRegister)

SHLR Rn (0 → Rn → T) 0100nnnn00000001 T = LSB

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ShlL2(SuperHRegister)

SHLL2 Rn (Rn << 2 → Rn) 0100nnnn00001000

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ShlR2(SuperHRegister)

SHLR2 Rn (Rn >> 2 → Rn) 0100nnnn00001001

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ShlL8(SuperHRegister)

SHLL8 Rn (Rn << 8 → Rn) 0100nnnn00011000

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ShlR8(SuperHRegister)

SHLR8 Rn (Rn >> 8 → Rn) 0100nnnn00011001

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ShlL16(SuperHRegister)

SHLL16 Rn (Rn << 16 → Rn) 0100nnnn00101000

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ShlR16(SuperHRegister)

SHLR16 Rn (Rn >> 16 → Rn) 0100nnnn00101001

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Bf(Displacement8)

BF label (When T = 0, disp * 2 + PC + 4 → PC, When T = 1, nop) 10001011dddddddd

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BfS(Displacement8)

BF/S label (Delayed branch; When T = 0, disp * 2 + PC + 4 → PC, When T = 1, nop) 10001111dddddddd

Level: Sh2

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Bt(Displacement8)

BT label (When T = 1, disp * 2 + PC + 4 → PC, When T = 0, nop) 10001001dddddddd

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BtS(Displacement8)

BT/S label (Delayed branch; When T = 1, disp * 2 + PC + 4 → PC, When T = 0, nop) 10001101dddddddd

Level: Sh2

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Bra(Displacement12)

BRA label (Delayed branch; disp * 2 + PC + 4 → PC) 1010dddddddddddd

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BraF(SuperHRegister)

BRA Rn (Delayed branch; Rn + PC + 4 → PC) 0000nnnn00100011

Level: Sh2

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Bsr(Displacement12)

BSR label (Delayed branch; PC + 4 → PR, disp * 2 + PC + 4 → PC) 1011dddddddddddd

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BsrF(SuperHRegister)

BSR Rn (Delayed branch; PC + 4 → PR, Rn + PC + 4 → PC) 0000nnnn00000011

Level: Sh2

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Jmp(SuperHRegister)

JMP @Rn (Delayed branch; Rn → PC) 0100nnnn00101011

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Jsr(SuperHRegister)

JSR @Rn (Delayed branch; PC + 4 → PR, Rn → PC) 0100nnnn00001011

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Rts

RTS (Delayed branch; PR → PC) 0000000000001011

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ClrMac

CLRMAC (0 → MACH, MACL) 0000000000101000

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ClrS

CLRS (0 → S) 0000000001001000

Level: Sh3

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ClrT

CLRT (0 → T) 0000000000001000 T = 0

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LdcSr(SuperHRegister)

LDC Rm,SR (Rm → SR) 0100mmmm00001110 T = LSB

Privileged

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LdcGbr(SuperHRegister)

LDC Rm,GBR (Rm → GBR) 0100mmmm00011110

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LdcVbr(SuperHRegister)

LDC Rm,VBR (Rm → VBR) 0100mmmm00101110

Privileged

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LdcSsr(SuperHRegister)

LDC Rm,SSR (Rm → SSR) 0100mmmm00111110

Privileged Level: Sh3

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LdcSpc(SuperHRegister)

LDC Rm,SPC (Rm → SPC) 0100mmmm01001110

Privileged Level: Sh3

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LdcDbr(SuperHRegister)

LDC Rm,DBR (Rm → DBR) 0100mmmm11111010

Privileged Level: Sh4

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LdcRnBank(SuperHRegister, SuperHRegisterBank)

LDC Rm,Rn_BANK (Rm → Rn_BANK (n = 0 to 7)) 0100mmmm1nnn1110

Privileged Level: Sh3

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LdcLSr(SuperHRegister)

LDC.L @Rm+,SR ((Rm) → SR, Rm + 4 → Rm) 0100mmmm00000111 T = LSB

Privileged

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LdcLGbr(SuperHRegister)

LDC.L @Rm+,GBR ((Rm) → GBR, Rm + 4 → Rm) 0100mmmm00010111

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LdcLVbr(SuperHRegister)

LDC.L @Rm+,VBR ((Rm) → VBR, Rm + 4 → Rm) 0100mmmm00100111

Privileged

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LdcLSsr(SuperHRegister)

LDC.L @Rm+,SSR ((Rm) → SSR, Rm + 4 → Rm) 0100mmmm00110111

Privileged Level: Sh3

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LdcLSpc(SuperHRegister)

LDC.L @Rm+,SPC ((Rm) → SPC, Rm + 4 → Rm) 0100mmmm01000111

Privileged Level: Sh3

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LdcLDbr(SuperHRegister)

LDC.L @Rm+,DBR ((Rm) → DBR, Rm + 4 → Rm) 0100mmmm11110110

Privileged Level: Sh4

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LdcLRnBank(SuperHRegister, SuperHRegisterBank)

LDC.L @Rm+,Rn_BANK ((Rm) → Rn_BANK (n = 0 to 7), Rm + 4 → Rm) 0100mmmm1nnn0111

Privileged Level: Sh3

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LdsMach(SuperHRegister)

LDS Rm,MACH (Rm → MACH) 0100mmmm00001010

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LdsMacl(SuperHRegister)

LDS Rm,MACL (Rm → MACL) 0100mmmm00011010

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LdsPr(SuperHRegister)

LDS Rm,PR (Rm → PR) 0100mmmm00101010

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LdsLMach(SuperHRegister)

LDS.L @Rm+,MACH ((Rm) → MACH, Rm + 4 → Rm) 0100mmmm00000110

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LdsLMacl(SuperHRegister)

LDS.L @Rm+,MACL ((Rm) → MACL, Rm + 4 → Rm) 0100mmmm00010110

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LdsLPr(SuperHRegister)

LDS.L @Rm+,PR ((Rm) → PR, Rm + 4 → Rm) 0100mmmm00100110

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Ldtlb

LDTLB (PTEH/PTEL → TLB) 0000000000111000

Privileged Features: MMU Level: Sh3

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MovcaL(SuperHRegister)

MOVCA.L R0,@Rn (R0 → (Rn) (without fetchingcache block)) 0000nnnn11000011

Level: Sh4

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Nop

NOP (No operation) 0000000000001001

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OcbI(SuperHRegister)

OCBI @Rn (Invalidates operand cache block) 0000nnnn10010011

Level: Sh4

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OcbP(SuperHRegister)

OCBP @Rn (Writes back and invalidates operand cache block) 0000nnnn10100011

Level: Sh4

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OcbWb(SuperHRegister)

OCBWB @Rn (Writes back operand cache block) 0000nnnn10110011

Level: Sh4

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Pref(SuperHRegister)

PREF @Rn ((Rn) → operand cache) 0000nnnn10000011

Level: Sh3

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Rte

RTE (Delayed branch; SSR/SPC → SR/PC) 0000000000101011

Privileged

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SetS

SETS (1 → S) 0000000001011000

Level: Sh3

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SetT

SETT (1 → T) 0000000000011000 T = 0

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Sleep

SLEEP (Sleep or standby) 0000000000011011

Privileged

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StcSr(SuperHRegister)

STC SR,Rn (SR → Rn) 0000nnnn00000010

Privileged

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StcGbr(SuperHRegister)

STC GBR,Rn (GBR → Rn) 0000nnnn00010010

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StcVbr(SuperHRegister)

STC VBR,Rn (VBR → Rn) 0000nnnn00100010

Privileged

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StcSsr(SuperHRegister)

STC SSR,Rn (SSR → Rn) 0000nnnn00110010

Privileged Level: Sh3

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StcSpc(SuperHRegister)

STC SPC,Rn (SPC → Rn) 0000nnnn01000010

Privileged Level: Sh3

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StcSgr(SuperHRegister)

STC SGR,Rn (SGR → Rn) 0000nnnn00111010

Privileged Level: Sh4

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StcDbr(SuperHRegister)

STC DBR,Rn (DBR → Rn) 0000nnnn11111010

Privileged Level: Sh4

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StcRmBank(SuperHRegisterBank, SuperHRegister)

STC Rm_BANK,Rn (Rm_BANK → Rn (m = 0 to 7)) 0000nnnn1mmm0010

Privileged Level: Sh3

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StcLSr(SuperHRegister)

STC.L SR,@-Rn (Rn - 4 → Rn, SR → (Rn)) 0100nnnn00000011

Privileged

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StcLGbr(SuperHRegister)

STC.L GBR,@-Rn (Rn - 4 → Rn, GBR → (Rn)) 0100nnnn00010011

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StcLVbr(SuperHRegister)

STC.L VBR,@-Rn (Rn - 4 → Rn, VBR → (Rn)) 0100nnnn00100011

Privileged

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StcLSsr(SuperHRegister)

STC.L SSR,@-Rn (Rn - 4 → Rn, SSR → (Rn)) 0100nnnn00110011

Privileged Level: Sh3

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StcLSpc(SuperHRegister)

STC.L SPC,@-Rn (Rn - 4 → Rn, SPC → (Rn)) 0100nnnn01000011

Privileged Level: Sh3

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StcLSgr(SuperHRegister)

STC.L SGR,@-Rn (Rn - 4 → Rn, SGR → (Rn)) 0100nnnn00110010

Privileged Level: Sh4

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StcLDbr(SuperHRegister)

STC.L DBR,@-Rn (Rn - 4 → Rn, DBR → (Rn)) 0100nnnn11110010

Privileged Level: Sh4

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StcLRmBank(SuperHRegisterBank, SuperHRegister)

STC.L Rm_BANK,@-Rn (Rn - 4 → Rn, Rm_BANK → (Rn) (m = 0 to 7)) 0100nnnn1mmm0011

Privileged Level: Sh3

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StsMach(SuperHRegister)

STS MACH,Rn (MACH → Rn) 0000nnnn00001010

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StsMacl(SuperHRegister)

STS MACL,Rn (MACL → Rn) 0000nnnn00011010

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StsPr(SuperHRegister)

STS PR,Rn (PR → Rn) 0000nnnn00101010

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StsLMach(SuperHRegister)

STS.L MACH,@-Rn (Rn - 4 → Rn, MACH → (Rn)) 0100nnnn00000010

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StsLMacl(SuperHRegister)

STS.L MACL,@-Rn (Rn - 4 → Rn, MACL → (Rn)) 0100nnnn00010010

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StsLPr(SuperHRegister)

STS.L PR,@-Rn (Rn - 4 → Rn, PR → (Rn)) 0100nnnn00100010

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Trapa(u8)

TRAPA #imm (PC + 2 → SPC, SR → SSR, #imm << 2 → TRA, 0x160 → EXPEVT, VBR + 0x0100 → PC) 11000011iiiiiiii

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Fldi0(SuperHFloatRegister)

FLDI0 FRn (0x00000000 → FRn) 1111nnnn10001101

Features: FPU Level: Sh4

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Fldi1(SuperHFloatRegister)

FLDI1 FRn (0x3F800000 → FRn) 1111nnnn10011101

Features: FPU Level: Sh4

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FMovS(SuperHFloatRegister, SuperHFloatRegister)

FMOV FRm,FRn (FRm → FRn) 1111nnnnmmmm1100

Features: FPU Level: Sh4

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FMovAtRegS(SuperHRegister, SuperHFloatRegister)

FMOV.S @Rm,FRn ((Rm) → FRn) 1111nnnnmmmm1000

Features: FPU Level: Sh4

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FMovAtIndexedRegisterS(SuperHRegister, SuperHFloatRegister)

FMOV.S @(R0,Rm),FRn ((R0 + Rm) → FRn) 1111nnnnmmmm0110

Features: FPU Level: Sh4

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FMovAtPostIncrementRegS(SuperHRegister, SuperHFloatRegister)

FMOV.S @Rm+,FRn ((Rm) → FRn, Rm + 4 → Rm) 1111nnnnmmmm1001

Features: FPU Level: Sh4

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FMovToAtRegS(SuperHFloatRegister, SuperHRegister)

FMOV.S FRm,@Rn (FRm → (Rn)) 1111nnnnmmmm1010

Features: FPU Level: Sh4

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FMovToAtPreDecrementRegS(SuperHFloatRegister, SuperHRegister)

FMOV.S FRm,@-Rn (Rn - 4 → Rn, FRm → (Rn)) 1111nnnnmmmm1011

Features: FPU Level: Sh4

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FMovToAtIndexedRegisterS(SuperHFloatRegister, SuperHRegister)

FMOV.S FRm,@(R0,Rn) (FRm → (R0 + Rn)) 1111nnnnmmmm0111

Features: FPU Level: Sh4

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FMov(SuperHDoubleRegister, SuperHDoubleRegister)

FMOV DRm,DRn (DRm → DRn) 1111nnn0mmm01100

Features: FPU Level: Sh4

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FMovAtReg(SuperHRegister, SuperHDoubleRegister)

FMOV @Rm,DRn ((Rm) → DRn) 1111nnn0mmmm1000

Features: FPU Level: Sh4

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FMovAtIndexedRegister(SuperHRegister, SuperHDoubleRegister)

FMOV @(R0,Rm),DRn ((R0 + Rm) → DRn) 1111nnn0mmmm0110

Features: FPU Level: Sh4

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FMovAtPostIncrementReg(SuperHRegister, SuperHDoubleRegister)

FMOV @Rm+,DRn ((Rm) → DRn, Rm + 8 → Rm) 1111nnn0mmmm1001

Features: FPU Level: Sh4

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FMovToAtReg(SuperHDoubleRegister, SuperHRegister)

FMOV DRm,@Rn (DRm → (Rn)) 1111nnnnmmm01010

Features: FPU Level: Sh4

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FMovToAtPreDecrementReg(SuperHDoubleRegister, SuperHRegister)

FMOV DRm,@-Rn (Rn - 8 → Rn, DRm → (Rn)) 1111nnnnmmm01011

Features: FPU Level: Sh4

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FMovToAtIndexedRegister(SuperHDoubleRegister, SuperHRegister)

FMOV DRm,@(R0,Rn) (DRm → (R0 + Rn)) 1111nnnnmmm00111

Features: FPU Level: Sh4

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Flds(SuperHFloatRegister)

FLDS FRm,FPUL (FRm → FPUL) 1111mmmm00011101

Features: FPU Level: Sh4

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Fsts(SuperHFloatRegister)

FSTS FPUL,FRn (FPUL → FRn) 1111nnnn00001101

Features: FPU Level: Sh4

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FabsS(SuperHFloatRegister)

FABS FRn (FRn & 0x7FFF_FFFF → FRn) 1111nnnn01011101

Features: FPU Level: Sh4

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FaddS(SuperHFloatRegister, SuperHFloatRegister)

FADD FRm,FRn (FRn + FRm → FRn) 1111nnnnmmmm0000

Features: FPU Level: Sh4

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FcmpEqS(SuperHFloatRegister, SuperHFloatRegister)

FCMP/EQ FRm,FRn (When FRn = FRm, 1 → T; Otherwise, 0 → T) 1111nnnnmmmm0100 T = Comparison result

Features: FPU Level: Sh4

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FcmpGtS(SuperHFloatRegister, SuperHFloatRegister)

FCMP/GT FRm,FRn (When FRn > FRm, 1 → T; Otherwise, 0 → T) 1111nnnnmmmm0101 T = Comparison result

Features: FPU Level: Sh4

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FdivS(SuperHFloatRegister, SuperHFloatRegister)

FDIV FRm,FRn (FRn / FRm → FRn) 1111nnnnmmmm0011

Features: FPU Level: Sh4

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FloatS(SuperHFloatRegister)

FLOAT FPUL,FRn ((float)FPUL → FRn) 1111nnnn00101101

Features: FPU Level: Sh4

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Fmac(SuperHFloatRegister, SuperHFloatRegister)

FMAC FR0,FRm,FRn (FR0 * FRm + FRn → FRn) 1111nnnnmmmm1110

Features: FPU Level: Sh4

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FmulS(SuperHFloatRegister, SuperHFloatRegister)

FMUL FRm,FRn (FRn * FRm → FRn) 1111nnnnmmmm0010

Features: FPU Level: Sh4

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FnegS(SuperHFloatRegister)

FNEG FRn (FRn ^ 0x8000_0000 → FRn) 1111nnnn01001101

Features: FPU Level: Sh4

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FsqrtS(SuperHFloatRegister)

FSQRT FRn (√FRn → FRn) 1111nnnn01101101

Features: FPU Level: Sh4

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FsubS(SuperHFloatRegister, SuperHFloatRegister)

FSUB FRm,FRn (FRn - FRm → FRn) 1111nnnnmmmm0001

Features: FPU Level: Sh4

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FrtcS(SuperHFloatRegister)

FRTC FPUL,FRm ((long)FRm → FPUL) 1111mmmm00111101

Features: FPU Level: Sh4

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Fabs(SuperHDoubleRegister)

FABS DRn (DRn & 0x7FFF_FFFF_FFFF_FFFF → DRn) 1111nnn001011101

Features: FPU Level: Sh4

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Fadd(SuperHDoubleRegister, SuperHDoubleRegister)

FADD DRm,DRn (DRn + DRm → DRn) 1111nnn0mmm00000

Features: FPU Level: Sh4

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FcmpEq(SuperHDoubleRegister, SuperHDoubleRegister)

FCMP/EQ DRm,DRn (When DRn = DRm, 1 → T; Otherwise, 0 → T) 1111nnn0mmm00100 T = Comparison result

Features: FPU Level: Sh4

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FcmpGt(SuperHDoubleRegister, SuperHDoubleRegister)

FCMP/GT DRm,DRn (When DRn > DRm, 1 → T; Otherwise, 0 → T) 1111nnn0mmm00101 T = Comparison result

Features: FPU Level: Sh4

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Fdiv(SuperHDoubleRegister, SuperHDoubleRegister)

FDIV DRm,DRn (DRn / DRm → DRn) 1111nnn0mmm00011

Features: FPU Level: Sh4

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FcnvDs(SuperHDoubleRegister)

FCNVDS DRm,FPUL (double_to_float[DRm] → FPUL) 1111mmm010111101

Features: FPU Level: Sh4

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FcnvSd(SuperHDoubleRegister)

FCNVSD FPUL,DRn (float_to_double[FPUL] → DRn) 1111nnn010101101

Features: FPU Level: Sh4

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Float(SuperHDoubleRegister)

FLOAT FPUL,DRn ((float)FPUL → DRn) 1111nnn000101101

Features: FPU Level: Sh4

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Fmul(SuperHDoubleRegister, SuperHDoubleRegister)

FMUL DRm,DRn (DRn * DRm → DRn) 1111nnn0mmm00010

Features: FPU Level: Sh4

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Fneg(SuperHDoubleRegister)

FNEG DRn (DRn ^ 0x8000_0000_0000_0000 → DRn) 1111nnn001001101

Features: FPU Level: Sh4

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Fsqrt(SuperHDoubleRegister)

FSQRT DRn (√DRn → DRn) 1111nnn001101101

Features: FPU Level: Sh4

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Fsub(SuperHDoubleRegister, SuperHDoubleRegister)

FSUB DRm,DRn (DRn - DRm → DRn) 1111nnn0mmm00001

Features: FPU Level: Sh4

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Frtc(SuperHDoubleRegister)

FRTC FPUL,DRm ((long)DRm → FPUL) 1111mmm000111101

Features: FPU Level: Sh4

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LdsFpscr(SuperHRegister)

LDS Rm,FPSCR (Rm → FPSCR) 0100mmmm01101010

Features: FPU Level: Sh4

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LdsFpul(SuperHRegister)

LDS Rm,FPUL (Rm → FPUL) 0100mmmm01011010

Features: FPU Level: Sh4

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LdsFpscrL(SuperHRegister)

LDS @Rm+,FPSCR (Rm → FPSCR, Rm + 4 → Rm) 0100mmmm01100110

Features: FPU Level: Sh4

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LdsFpulL(SuperHRegister)

LDS @Rm+,FPUL (Rm → FPUL, Rm + 4 → Rm) 0100mmmm01010110

Features: FPU Level: Sh4

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StsFpscr(SuperHRegister)

STS FPSCR,Rn (FPSCR → Rn) 0000nnnn01101010

Features: FPU Level: Sh4

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StsFpul(SuperHRegister)

STS FPUL,Rn (FPUL → Rn) 0000nnnn01011010

Features: FPU Level: Sh4

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StsFpscrL(SuperHRegister)

STS FPSCR,@-Rn (Rn - 4 → Rn, FPSCR → Rn) 0100nnnn01100010

Features: FPU Level: Sh4

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StsFpulL(SuperHRegister)

STS FPUL,@-Rn (Rn - 4 → Rn, FPUL → Rn) 0100nnnn01010010

Features: FPU Level: Sh4

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FMovToX(SuperHDoubleRegister, SuperHExtendedDoubleRegister)

FMOV DRm,XDn (DRm → XDn) 1111nnn1mmm01100

Features: FPU Level: Sh4

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FMovFromX(SuperHExtendedDoubleRegister, SuperHDoubleRegister)

FMOV XDm,DRn (XDm → DRn) 1111nnn0mmm11100

Features: FPU Level: Sh4

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FMovX(SuperHExtendedDoubleRegister, SuperHExtendedDoubleRegister)

FMOV XDm,XDn (XDm → XDn) 1111nnn1mmm11100

Features: FPU Level: Sh4

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FMovAtRegX(SuperHRegister, SuperHExtendedDoubleRegister)

FMOV @Rm,XDn ((Rm) → XDn) 1111nnn1mmmm1000

Features: FPU Level: Sh4

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FMovAtPostIncrementRegX(SuperHRegister, SuperHExtendedDoubleRegister)

FMOV @Rm+,XDn ((Rm) → XDn, Rm + 8 → Rm) 1111nnn1mmmm1001

Features: FPU Level: Sh4

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FMovAtIndexedRegisterX(SuperHRegister, SuperHExtendedDoubleRegister)

FMOV @(R0,Rm),XDn ((R0 + Rm) → XDn) 1111nnn1mmmm0110

Features: FPU Level: Sh4

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FMovToAtRegX(SuperHExtendedDoubleRegister, SuperHRegister)

FMOV XDm,@Rn (XDm → (Rn)) 1111nnnnmmm11010

Features: FPU Level: Sh4

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FMovToAtPreDecrementRegX(SuperHExtendedDoubleRegister, SuperHRegister)

FMOV XDm,@-Rn (Rn - 8 → Rn, XDm → (Rn)) 1111nnnnmmm11011

Features: FPU Level: Sh4

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FMovToAtIndexedRegisterX(SuperHExtendedDoubleRegister, SuperHRegister)

FMOV XDm,@(R0,Rn) (XDm → (R0 + Rn)) 1111nnnnmmm10111

Features: FPU Level: Sh4

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Fipr(SuperHVectorFloatRegister, SuperHVectorFloatRegister)

FIPR FVm,FVn (inner_product[FVm, FVn] → FR[n + 3]) 1111nnmm11101101

Features: FPU Level: Sh4

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Xmrtx(SuperHVectorFloatRegister)

XMRTX FVn (transform_vector[XMTRX, FVn] → FVn) 1111nn0111111101

Features: FPU Level: Sh4

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FrChg

FRCHG (~FPSCR.FR → SPFCR.FR) 1111101111111101

Features: FPU Level: Sh4

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FsChg

FSCHG (~FPSCR.SZ → SPFCR.SZ) 1111001111111101

Features: FPU Level: Sh4

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CasL(SuperHRegister, SuperHRegister)

CAS.L Rm,Rn,@R0 (When a byte in Rn equals a byte in Rm, 1 → T) 0010nnnnmmmm0011

https://github.com/j-core/jcore-cpu/blob/00f398e/decode/decode_table_simple.vhd#L1919

Features: J2 Level: J2

Implementations§

Source§

impl SuperHInstruction

Source

pub fn parse(ins: u16, fpscr_sz: bool) -> Option<SuperHInstruction>

Parse a single instruction with the specified architectural state

This parses among all valid instructions; feature-gating must be performed separately

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impl SuperHInstruction

pub fn features(self) -> SuperHFeatures

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impl SuperHInstruction

pub fn level(self) -> SuperHLevel

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impl SuperHInstruction

pub fn is_privileged(self) -> bool

Trait Implementations§

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impl Clone for SuperHInstruction

Source§

fn clone(&self) -> SuperHInstruction

Returns a copy of the value. Read more
1.0.0 · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Debug for SuperHInstruction

Source§

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Default for SuperHInstruction

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fn default() -> SuperHInstruction

Returns the “default value” for a type. Read more
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impl Display for SuperHInstruction

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Hash for SuperHInstruction

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fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher. Read more
1.3.0 · Source§

fn hash_slice<H>(data: &[Self], state: &mut H)
where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher. Read more
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impl Instruction for SuperHInstruction

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fn well_defined(&self) -> bool

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impl Into<u16> for SuperHInstruction

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fn into(self) -> u16

Converts this type into the (usually inferred) input type.
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impl LengthedInstruction for SuperHInstruction

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type Unit = AddressDiff<u32>

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fn len(&self) -> Self::Unit

the length, in terms of Unit, of this instruction. because Unit will be a diff of an architecture’s Address type, this almost always is a number of bytes. implementations should indicate if this is ever not the case.
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fn min_size() -> Self::Unit

the length, in terms of Unit, of the shortest possible instruction in a given architecture.. because Unit will be a diff of an architecture’s Address type, this almost always is a number of bytes. implementations should indicate if this is ever not the case.
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impl Ord for SuperHInstruction

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fn cmp(&self, other: &SuperHInstruction) -> Ordering

This method returns an Ordering between self and other. Read more
1.21.0 · Source§

fn max(self, other: Self) -> Self
where Self: Sized,

Compares and returns the maximum of two values. Read more
1.21.0 · Source§

fn min(self, other: Self) -> Self
where Self: Sized,

Compares and returns the minimum of two values. Read more
1.50.0 · Source§

fn clamp(self, min: Self, max: Self) -> Self
where Self: Sized,

Restrict a value to a certain interval. Read more
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impl PartialEq for SuperHInstruction

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fn eq(&self, other: &SuperHInstruction) -> bool

Tests for self and other values to be equal, and is used by ==.
1.0.0 · Source§

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl PartialOrd for SuperHInstruction

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fn partial_cmp(&self, other: &SuperHInstruction) -> Option<Ordering>

This method returns an ordering between self and other values if one exists. Read more
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fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator. Read more
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fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator. Read more
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fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator. Read more
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fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator. Read more
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impl Copy for SuperHInstruction

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impl Eq for SuperHInstruction

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impl StructuralPartialEq for SuperHInstruction

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dst: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dst. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T> ToOwned for T
where T: Clone,

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type Owned = T

The resulting type after obtaining ownership.
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fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more
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fn clone_into(&self, target: &mut T)

Uses borrowed data to replace owned data, usually by cloning. Read more
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impl<T> ToString for T
where T: Display + ?Sized,

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default fn to_string(&self) -> String

Converts the given value to a String. Read more
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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.